bench_zp7_portable_pext.txt

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Sorted summary for file /tmp/bittricks/build/bench/bench_freestanding
----------------------------------------------

   50.26 bench_freestanding.c:162
    9.42 bench_freestanding.c:199
    9.05 rand.h:28
    6.45 rand.h:27
    5.70 bench_freestanding.c:170
    3.61 bench_freestanding.c:174
    3.17 bench_freestanding.c:172
    2.94 bench_freestanding.c:168
    2.42 rand.h:29
    2.18 bench_freestanding.c:232
 Percent |  Source code & Disassembly of bench_freestanding for cpu_core/cycles/P (914 samples, percent: local period)
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         :
         :
         :
         : 3    Disassembly of section .text:
         :
         : 5    0000000000001b20 <bench_zp7_portable_pext>:
         : 6    a = (a & ~bit) + ((a & bit) << shift);
         : 7    }
         : 8    return a;
         : 9    }
         :
         : 11   bench bench_zp7_portable_pext(uint64_t seed) {
    0.00 :   1b20:   push   %rbp
    0.00 :   1b21:   mov    %rdi,%rbp
         : 14   bench b = new_bench(seed);
         : 15   clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &b.start);
    0.00 :   1b24:   mov    $0x2,%edi
         : 17   bench bench_zp7_portable_pext(uint64_t seed) {
    0.00 :   1b29:   push   %rbx
    0.00 :   1b2a:   mov    %rsi,%rbx
    0.00 :   1b2d:   sub    $0x78,%rsp
         : 21   return b;
    0.00 :   1b31:   mov    %rsi,0x40(%rsp)
         : 23   clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &b.start);
    0.00 :   1b36:   lea    0x48(%rsp),%rsi
         : 25   return b;
    0.00 :   1b3b:   movq   $0x0,0x48(%rsp)
    0.00 :   1b44:   movq   $0x0,0x50(%rsp)
    0.00 :   1b4d:   movq   $0x0,0x58(%rsp)
    0.00 :   1b56:   movq   $0x0,0x60(%rsp)
         : 30   clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &b.start);
    0.00 :   1b5f:   call   1030 <clock_gettime@plt>
         : 32   for (size_t i = 0; i < ITERS; i++) {
    0.00 :   1b64:   movq   0x40(%rsp),%xmm0
    0.00 :   1b6a:   movq   %rbx,%xmm10
    0.00 :   1b6f:   movabs $0x78dde6e5fd29f054,%rcx
    0.00 :   1b79:   movq   %rcx,%xmm7
         : 37   clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &b.start);
    0.00 :   1b7e:   pxor   %xmm11,%xmm11
         : 39   // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
         : 40   // SOFTWARE.
         : 41   static const uint64_t PHI  = 0x9e3779b97f4a7c15;
         : 42   static uint64_t rand_state;
         : 43   static uint64_t rand_u64() {
         : 44   rand_state += PHI;
    0.00 :   1b83:   movabs $0x9e3779b97f4a7c15,%rcx
         : 46   uint64_t z = rand_state;
         : 47   z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
         : 48   z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
    0.00 :   1b8d:   movabs $0x94d049bb133111eb,%rdi
    0.00 :   1b97:   punpcklqdq %xmm7,%xmm7
    0.00 :   1b9b:   movq   %rdi,%xmm8
    0.00 :   1ba0:   movabs $0x3c6ef372fe94f82a,%rdx
         : 53   masks.bits[5] = -mask << 1;
    0.00 :   1baa:   movq   %xmm0,0x38(%rsp)
    0.00 :   1bb0:   movaps %xmm7,(%rsp)
         : 56   rand_state += PHI;
    0.00 :   1bb4:   movq   %rcx,%xmm7
         : 58   z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
    0.00 :   1bb9:   punpcklqdq %xmm8,%xmm8
         : 60   z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    0.00 :   1bbe:   movabs $0xbf58476d1ce4e5b9,%rcx
         : 62   rand_state += PHI;
    0.00 :   1bc8:   punpcklqdq %xmm7,%xmm7
         : 64   z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    0.00 :   1bcc:   movq   %rcx,%xmm9
    0.00 :   1bd1:   lea    (%rbx,%rdx,1),%rax
         : 67   rand_state += PHI;
    0.00 :   1bd5:   movaps %xmm7,0x10(%rsp)
         : 69   z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    0.00 :   1bda:   punpcklqdq %xmm9,%xmm9
         : 71   rand_state += PHI;
    0.00 :   1bdf:   movq   %rdx,%xmm7
         : 73   z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
    0.00 :   1be4:   movdqa %xmm8,%xmm12
         : 75   z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    0.00 :   1be9:   movdqa %xmm9,%xmm13
         : 77   rand_state += PHI;
    0.00 :   1bee:   punpcklqdq %xmm7,%xmm7
    0.00 :   1bf2:   movdqa %xmm11,%xmm14
    0.00 :   1bf7:   pinsrq $0x1,%rax,%xmm10
         : 81   z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    0.00 :   1bfe:   psrlq  $0x20,%xmm13
         : 83   clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &b.start);
    0.00 :   1c04:   xor    %eax,%eax
         : 85   rand_state += PHI;
    0.00 :   1c06:   movaps %xmm7,0x20(%rsp)
         : 87   z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
    0.00 :   1c0b:   psrlq  $0x20,%xmm12
    0.00 :   1c11:   data16 cs nopw 0x0(%rax,%rax,1)
    0.00 :   1c1c:   nopl   0x0(%rax)
         : 91   rand_state += PHI;
    0.00 :   1c20:   movdqa 0x10(%rsp),%xmm0
    0.00 :   1c26:   movdqa %xmm10,%xmm2
         : 94   mask = ~mask;
    0.00 :   1c2b:   pcmpeqd %xmm5,%xmm5
    1.20 :   1c2f:   add    $0x1,%eax // bench_freestanding.c:168
    0.00 :   1c32:   paddq  (%rsp),%xmm10
    0.00 :   1c38:   paddq  %xmm2,%xmm0
    0.00 :   1c3c:   paddq  0x20(%rsp),%xmm2
         : 100  z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    1.31 :   1c42:   movdqa %xmm0,%xmm1 // rand.h:27
    0.00 :   1c46:   psrlq  $0x1e,%xmm1
    0.00 :   1c4b:   pxor   %xmm0,%xmm1
    0.00 :   1c4f:   movdqa %xmm1,%xmm0
    2.20 :   1c53:   movdqa %xmm1,%xmm3
    0.00 :   1c57:   psrlq  $0x20,%xmm0
    0.00 :   1c5c:   pmuludq %xmm13,%xmm1
    0.00 :   1c61:   pmuludq %xmm9,%xmm0
    1.20 :   1c66:   pmuludq %xmm9,%xmm3
    0.00 :   1c6b:   paddq  %xmm1,%xmm0
    0.00 :   1c6f:   psllq  $0x20,%xmm0
    0.00 :   1c74:   paddq  %xmm3,%xmm0
         : 113  z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
    1.64 :   1c78:   movdqa %xmm0,%xmm1 // rand.h:28
    0.00 :   1c7c:   psrlq  $0x1b,%xmm1
    0.00 :   1c81:   pxor   %xmm0,%xmm1
    0.00 :   1c85:   movdqa %xmm1,%xmm0
    0.54 :   1c89:   movdqa %xmm1,%xmm7
    0.00 :   1c8d:   psrlq  $0x20,%xmm0
    0.00 :   1c92:   pmuludq %xmm12,%xmm1
    0.00 :   1c97:   pmuludq %xmm8,%xmm0
    2.17 :   1c9c:   pmuludq %xmm8,%xmm7
    0.00 :   1ca1:   paddq  %xmm1,%xmm0
         : 124  z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    0.00 :   1ca5:   movdqa %xmm2,%xmm1
    0.00 :   1ca9:   psrlq  $0x1e,%xmm1
         : 127  z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
    1.30 :   1cae:   psllq  $0x20,%xmm0
         : 129  z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    0.00 :   1cb3:   pxor   %xmm2,%xmm1
         : 131  z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
    0.00 :   1cb7:   paddq  %xmm0,%xmm7
         : 133  z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
    0.00 :   1cbb:   movdqa %xmm1,%xmm0
    0.75 :   1cbf:   movdqa %xmm1,%xmm2 // rand.h:27
    0.00 :   1cc3:   psrlq  $0x20,%xmm0
    0.00 :   1cc8:   pmuludq %xmm13,%xmm1
    0.00 :   1ccd:   pmuludq %xmm9,%xmm0
    0.99 :   1cd2:   pmuludq %xmm9,%xmm2
    0.00 :   1cd7:   paddq  %xmm1,%xmm0
    0.00 :   1cdb:   psllq  $0x20,%xmm0
    0.00 :   1ce0:   paddq  %xmm2,%xmm0
         : 143  z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
    0.66 :   1ce4:   movdqa %xmm0,%xmm1 // rand.h:28
    0.00 :   1ce8:   psrlq  $0x1b,%xmm1
    0.00 :   1ced:   pxor   %xmm0,%xmm1
    0.00 :   1cf1:   movdqa %xmm1,%xmm0
    1.31 :   1cf5:   movdqa %xmm1,%xmm2
    0.00 :   1cf9:   psrlq  $0x20,%xmm0
    0.00 :   1cfe:   pmuludq %xmm12,%xmm1
    0.00 :   1d03:   pmuludq %xmm8,%xmm0
    1.43 :   1d08:   pmuludq %xmm8,%xmm2
    0.00 :   1d0d:   paddq  %xmm1,%xmm0
    0.00 :   1d11:   psllq  $0x20,%xmm0
    0.00 :   1d16:   paddq  %xmm2,%xmm0
         : 156  return z ^ (z >> 31);
    2.42 :   1d1a:   movdqa %xmm0,%xmm6 // rand.h:29
    0.00 :   1d1e:   psrlq  $0x1f,%xmm6
    0.00 :   1d23:   pxor   %xmm0,%xmm6
    0.00 :   1d27:   movdqa %xmm5,%xmm0
    1.74 :   1d2b:   pxor   %xmm6,%xmm0 // bench_freestanding.c:168
         : 162  x ^= x << (1 << i);
    0.00 :   1d2f:   movdqa %xmm0,%xmm1
         : 164  uint64_t bit = prefix_sum_u64(mask << 1);
    0.00 :   1d33:   movdqa %xmm0,%xmm2
    0.00 :   1d37:   psllq  $0x1,%xmm2
         : 167  x ^= x << (1 << i);
    1.86 :   1d3c:   psllq  $0x2,%xmm1 // bench_freestanding.c:162
    0.00 :   1d41:   pxor   %xmm2,%xmm1
    0.00 :   1d45:   movdqa %xmm1,%xmm2
    0.00 :   1d49:   psllq  $0x2,%xmm2
    1.42 :   1d4e:   pxor   %xmm1,%xmm2
    0.00 :   1d52:   movdqa %xmm2,%xmm1
    0.00 :   1d56:   psllq  $0x4,%xmm1
    0.00 :   1d5b:   pxor   %xmm2,%xmm1
    1.20 :   1d5f:   movdqa %xmm1,%xmm2
    0.00 :   1d63:   psllq  $0x8,%xmm2
    0.00 :   1d68:   pxor   %xmm1,%xmm2
    0.00 :   1d6c:   movdqa %xmm2,%xmm1
    1.65 :   1d70:   psllq  $0x10,%xmm1
    0.00 :   1d75:   pxor   %xmm2,%xmm1
    0.00 :   1d79:   movdqa %xmm1,%xmm5
    0.00 :   1d7d:   psllq  $0x20,%xmm5
    1.65 :   1d82:   pxor   %xmm1,%xmm5
         : 185  mask &= bit;
    0.00 :   1d86:   pand   %xmm5,%xmm0
         : 187  x ^= x << (1 << i);
    0.00 :   1d8a:   movdqa %xmm0,%xmm1
         : 189  uint64_t bit = prefix_sum_u64(mask << 1);
    0.00 :   1d8e:   movdqa %xmm0,%xmm2
    1.98 :   1d92:   psllq  $0x1,%xmm2 // bench_freestanding.c:170
         : 192  x ^= x << (1 << i);
    0.00 :   1d97:   psllq  $0x2,%xmm1
    0.00 :   1d9c:   pxor   %xmm2,%xmm1
    0.00 :   1da0:   movdqa %xmm1,%xmm2
    1.54 :   1da4:   psllq  $0x2,%xmm2 // bench_freestanding.c:162
    0.00 :   1da9:   pxor   %xmm1,%xmm2
    0.00 :   1dad:   movdqa %xmm2,%xmm1
    0.11 :   1db1:   psllq  $0x4,%xmm1
    1.31 :   1db6:   pxor   %xmm2,%xmm1
    0.00 :   1dba:   movdqa %xmm1,%xmm2
    0.10 :   1dbe:   psllq  $0x8,%xmm2
    0.00 :   1dc3:   pxor   %xmm1,%xmm2
    1.32 :   1dc7:   movdqa %xmm2,%xmm1
    0.00 :   1dcb:   psllq  $0x10,%xmm1
    0.00 :   1dd0:   pxor   %xmm2,%xmm1
    0.00 :   1dd4:   movdqa %xmm1,%xmm4
    1.32 :   1dd8:   psllq  $0x20,%xmm4
    0.00 :   1ddd:   pxor   %xmm1,%xmm4
         : 210  mask &= bit;
    0.11 :   1de1:   pand   %xmm4,%xmm0
         : 212  x ^= x << (1 << i);
    0.00 :   1de5:   movdqa %xmm0,%xmm1
         : 214  uint64_t bit = prefix_sum_u64(mask << 1);
    1.43 :   1de9:   movdqa %xmm0,%xmm2 // bench_freestanding.c:170
    0.44 :   1ded:   psllq  $0x1,%xmm2
         : 217  x ^= x << (1 << i);
    0.11 :   1df2:   psllq  $0x2,%xmm1
    0.22 :   1df7:   pxor   %xmm2,%xmm1
    1.75 :   1dfb:   movdqa %xmm1,%xmm2 // bench_freestanding.c:162
    0.98 :   1dff:   psllq  $0x2,%xmm2
    0.22 :   1e04:   pxor   %xmm1,%xmm2
    0.00 :   1e08:   movdqa %xmm2,%xmm1
    1.20 :   1e0c:   psllq  $0x4,%xmm1
    0.00 :   1e11:   pxor   %xmm2,%xmm1
    0.00 :   1e15:   movdqa %xmm1,%xmm2
    0.77 :   1e19:   psllq  $0x8,%xmm2
    1.43 :   1e1e:   pxor   %xmm1,%xmm2
    0.00 :   1e22:   movdqa %xmm2,%xmm1
    0.42 :   1e26:   psllq  $0x10,%xmm1
    0.33 :   1e2b:   pxor   %xmm2,%xmm1
    0.55 :   1e2f:   movdqa %xmm1,%xmm3
    1.09 :   1e33:   psllq  $0x20,%xmm3
    0.33 :   1e38:   pxor   %xmm1,%xmm3
         : 235  mask &= bit;
    1.21 :   1e3c:   pand   %xmm3,%xmm0 // bench_freestanding.c:172
         : 237  x ^= x << (1 << i);
    0.33 :   1e40:   movdqa %xmm0,%xmm1
         : 239  uint64_t bit = prefix_sum_u64(mask << 1);
    0.00 :   1e44:   movdqa %xmm0,%xmm2
    1.63 :   1e48:   psllq  $0x1,%xmm2 // bench_freestanding.c:170
         : 242  x ^= x << (1 << i);
    0.76 :   1e4d:   psllq  $0x2,%xmm1 // bench_freestanding.c:162
    0.44 :   1e52:   pxor   %xmm2,%xmm1
    0.00 :   1e56:   movdqa %xmm1,%xmm2
    1.97 :   1e5a:   psllq  $0x2,%xmm2
    0.76 :   1e5f:   pxor   %xmm1,%xmm2
    0.22 :   1e63:   movdqa %xmm2,%xmm1
    1.43 :   1e67:   psllq  $0x4,%xmm1
    0.66 :   1e6c:   pxor   %xmm2,%xmm1
    0.00 :   1e70:   movdqa %xmm1,%xmm2
    2.07 :   1e74:   psllq  $0x8,%xmm2
    0.99 :   1e79:   pxor   %xmm1,%xmm2
    0.00 :   1e7d:   movdqa %xmm2,%xmm1
    2.29 :   1e81:   psllq  $0x10,%xmm1
    0.22 :   1e86:   pxor   %xmm2,%xmm1
    0.00 :   1e8a:   movdqa %xmm1,%xmm2
    1.65 :   1e8e:   psllq  $0x20,%xmm2
    0.66 :   1e93:   pxor   %xmm1,%xmm2
         : 260  mask &= bit;
    1.20 :   1e97:   pand   %xmm2,%xmm0 // bench_freestanding.c:172
         : 262  x ^= x << (1 << i);
    0.00 :   1e9b:   movdqa %xmm0,%xmm15
         : 264  uint64_t bit = prefix_sum_u64(mask << 1);
    0.66 :   1ea0:   movdqa %xmm0,%xmm1 // bench_freestanding.c:170
         : 266  x ^= x << (1 << i);
    2.09 :   1ea4:   psllq  $0x2,%xmm15 // bench_freestanding.c:162
         : 268  uint64_t bit = prefix_sum_u64(mask << 1);
    0.33 :   1eaa:   psllq  $0x1,%xmm1
         : 270  x ^= x << (1 << i);
    0.77 :   1eaf:   pxor   %xmm15,%xmm1
    0.00 :   1eb4:   movdqa %xmm1,%xmm15
    2.31 :   1eb9:   psllq  $0x2,%xmm15
    0.77 :   1ebf:   pxor   %xmm15,%xmm1
    0.00 :   1ec4:   movdqa %xmm1,%xmm15
    2.51 :   1ec9:   psllq  $0x4,%xmm15
    0.32 :   1ecf:   pxor   %xmm15,%xmm1
    0.00 :   1ed4:   movdqa %xmm1,%xmm15
    2.53 :   1ed9:   psllq  $0x8,%xmm15
    0.66 :   1edf:   pxor   %xmm15,%xmm1
    0.00 :   1ee4:   movdqa %xmm1,%xmm15
    2.74 :   1ee9:   psllq  $0x10,%xmm15
    0.22 :   1eef:   pxor   %xmm15,%xmm1
    0.00 :   1ef4:   movdqa %xmm1,%xmm15
    1.09 :   1ef9:   psllq  $0x20,%xmm15
    0.55 :   1eff:   pxor   %xmm15,%xmm1
         : 287  mask &= bit;
    0.77 :   1f04:   pand   %xmm1,%xmm0 // bench_freestanding.c:172
    0.00 :   1f08:   movdqa %xmm0,%xmm15
         : 290  masks.bits[5] = -mask << 1;
    0.21 :   1f0d:   movdqa %xmm14,%xmm0
    1.85 :   1f12:   psubq  %xmm15,%xmm0 // bench_freestanding.c:174
    0.11 :   1f17:   movdqa %xmm7,%xmm15
    0.00 :   1f1c:   psrlq  $0x1f,%xmm15
    1.75 :   1f22:   psllq  $0x1,%xmm0
    0.00 :   1f27:   pxor   %xmm7,%xmm15
         : 297  a &= mask;
    0.00 :   1f2c:   pand   %xmm6,%xmm15
         : 299  a = (a & ~bit) | ((a & bit) >> shift);
    0.00 :   1f31:   movdqa %xmm15,%xmm6
    1.42 :   1f36:   pand   %xmm5,%xmm6 // bench_freestanding.c:199
    0.00 :   1f3a:   pandn  %xmm15,%xmm5
    0.00 :   1f3f:   psrlq  $0x1,%xmm6
    0.00 :   1f44:   por    %xmm6,%xmm5
    1.43 :   1f48:   movdqa %xmm5,%xmm6
    0.00 :   1f4c:   pand   %xmm4,%xmm6
    0.00 :   1f50:   pandn  %xmm5,%xmm4
    0.00 :   1f54:   psrlq  $0x2,%xmm6
    1.09 :   1f59:   por    %xmm6,%xmm4
    0.00 :   1f5d:   movdqa %xmm4,%xmm5
    0.00 :   1f61:   pand   %xmm3,%xmm5
    0.00 :   1f65:   pandn  %xmm4,%xmm3
    1.86 :   1f69:   psrlq  $0x4,%xmm5
    0.00 :   1f6e:   por    %xmm5,%xmm3
    0.00 :   1f72:   movdqa %xmm3,%xmm4
    0.00 :   1f76:   pand   %xmm2,%xmm4
    0.55 :   1f7a:   pandn  %xmm3,%xmm2
    0.00 :   1f7e:   psrlq  $0x8,%xmm4
    0.00 :   1f83:   por    %xmm4,%xmm2
    0.00 :   1f87:   movdqa %xmm2,%xmm3
    1.09 :   1f8b:   pand   %xmm1,%xmm3
    0.00 :   1f8f:   pandn  %xmm2,%xmm1
    0.00 :   1f93:   psrlq  $0x10,%xmm3
    0.00 :   1f98:   por    %xmm3,%xmm1
    0.54 :   1f9c:   movdqa %xmm1,%xmm2
    0.00 :   1fa0:   pand   %xmm0,%xmm2
    0.00 :   1fa4:   pandn  %xmm1,%xmm0
    0.00 :   1fa8:   psrlq  $0x20,%xmm2
    1.43 :   1fad:   por    %xmm2,%xmm0
         : 330  uint64_t data = rand_u64(), mask = rand_u64();
         : 331  ppp_u64 masks = ppp_u64_portable(mask);
         : 332  b.last ^= pext_u64_pre(data, mask, &masks);
    0.00 :   1fb1:   pxor   %xmm0,%xmm11
         : 334  for (size_t i = 0; i < ITERS; i++) {
    0.00 :   1fb6:   cmp    $0x7a120,%eax
    2.18 :   1fbb:   jne    1c20 <bench_zp7_portable_pext+0x100> // bench_freestanding.c:232
    0.00 :   1fc1:   movdqa %xmm11,%xmm0
         : 338  }
         : 339  clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &b.end);
    0.00 :   1fc6:   lea    0x58(%rsp),%rsi
    0.00 :   1fcb:   mov    $0x2,%edi
    0.00 :   1fd0:   movq   0x38(%rsp),%xmm3
    0.00 :   1fd6:   movabs $0xfa3d6d1c97aede80,%rax
    0.00 :   1fe0:   psrldq $0x8,%xmm0
    0.00 :   1fe5:   pxor   %xmm11,%xmm0
    0.00 :   1fea:   add    %rax,%rbx
    0.00 :   1fed:   pxor   %xmm0,%xmm3
    0.00 :   1ff1:   mov    %rbx,0x3030(%rip)        # 5028 <rand_state>
    0.00 :   1ff8:   movq   %xmm3,0x40(%rsp)
    0.00 :   1ffe:   call   1030 <clock_gettime@plt>
         : 351  return b;
    0.00 :   2003:   movdqa 0x40(%rsp),%xmm0
    0.00 :   2009:   mov    0x60(%rsp),%rax
    0.00 :   200e:   movups %xmm0,0x0(%rbp)
    0.00 :   2012:   movdqa 0x50(%rsp),%xmm0
    0.00 :   2018:   mov    %rax,0x20(%rbp)
         : 357  }
    0.00 :   201c:   mov    %rbp,%rax
         : 359  return b;
    0.00 :   201f:   movups %xmm0,0x10(%rbp)
         : 361  }
    0.00 :   2023:   add    $0x78,%rsp
    0.00 :   2027:   pop    %rbx
    0.00 :   2028:   pop    %rbp
    0.00 :   2029:   ret